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February 1996
NDS9400A
Single P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy
pulses in the avalanche and commutation modes. These
devices are particularly suited for low voltage applications such
as notebook computer power management and other battery
Features
-3.4A, -30V. R DS(ON) = 0.13 ? @ V GS = -10V.
High density cell design for extremely low R DS(ON) .
High power and current handling capability in a widely used
surface mount package.
Rugged and reliable.
powered circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
________________________________________________________________________________
5
6
7
8
4
3
2
1
Absolute Maximum Ratings
T A = 25°C unless otherwise noted
Symbol
V DSS
V GSS
Parameter
Drain-Source Voltage
Gate-Source Voltage
NDS9400A
-30
± 20
Units
V
V
I D
Drain Current - Continuous
(Note 1a)
± 3.4
A
- Pulsed
± 10
P D
Maximum Power Dissipation
(Note 1a)
2.5
W
(Note 1b)
(Note 1c)
1.2
1
T J ,T STG
Operating and Storage Temperature Range
-55 to 150
°C
THERMAL CHARACTERISTICS
R θ JA
R θ JC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
50
25
°C/W
°C/W
? 1997 Fairchild Semiconductor Corporation
NDS9400A.SAM
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